Image Enhancement

Please roll over image to see before/after image processing:

DDC has a library of configurable, flexible embedded IP Core Solutions - including advanced video and image processing... DDC has an extensive IP portfolio, covering a wide variety of image processing, camera and video interfaces, communications, and peripherals.  This IP (combined with Design Services) results in embedded solutions that are fully tuned to your needs.  DDC IP works with a wide variety of processors and standard bus interfaces, etc.  And they are supported on a wide variety of platforms, but notably including Altera and Xilinx FPGAs.  These blocks can provide advanced functionality to differentiate your product. The IP tends to be highly optimized, well worked out, and field-proven. Our experts can also help integrate it, and develop the surrounding electronics and gaskets as needed. DDC can also provide field-proven circuit boards and systems which can turn-key your application, or develop custom boards or systems for your needs.

The bridge image above shows the 8 bit bridge image as it would typically be produced – using histogram equalization.  This global equalization process puts too much of the image into “under saturated” values – i.e. wasting valuable information.  The “after” image shows how optimizing each pixel – a compute intensive process that DDC makes available in a hardware or IP version – can greatly enhance situational awareness.

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Optical Flow

Stereo Vision

Image Enhancement (LAP)

Track moving objects or people with stationary or moving camera

Range objects - HDR imaging - 3D cameras

Extreme Detail Extraction

DDC optical flow can be illustrated with motion vectors that show motion that exists from a reference frame to another frame.  The camera in this sequence is mounted on a car that is traveling on the right side of the road.  The vectors illustrate the optical flow of the oncoming car. If the camera itself is in motion, the background motion is subtracted out to reveal relative motion of objects. This FPGA based implementation is configurable and flexible.
As the camera set is approached, the user changes from green to red.  The coloring indicates the distance (in the provided IP core, a disparity map is provided, indicating the distances of the pixels). Used in pedestrian detection, parking assist and military applications, this IP can be configured to make dual camera solutions intelligent. In HDR applications, rather than ranging, each camera can represent a different exposure/integration-time to create a high dynamic range image for extra detail enhancement.  The DDC Stereo Vision FPGA core with colorized disparity map is highly configurable.
Many current systems throw out valuable information before it reaches the end user.  Our LAP core brings out configurable detail, all the way into the extreme for forensic detail extraction. This is useful in military, medical, and other applications where high dynamic range is present, or desired. DDC offers LAP, HDR and other enhancements (and recording).

Image Stabilization

Trackers

Open GL Graphics

Real time high frame rate video stabilization reduces frame cropping artifacts.

Multi Target Tracker

Accelerated Open GL

Real time advanced embedded image stabilization is a compute intensive process that can overwhelm CPUs, especially with higher resolutions or frame rates. The benefit of massively parallel FPGA based stabilization is the ability to have a high quality implementation, tunable for a wide variety of environments, with no imposition on the processor or rest of the lineup.  DDC offers advanced embedded image stabilization in conjunction with other processing to create the optimal solution for clients.
DDC's FPGA based multi-target tracker is able to track multiple on-screen objects, and off screen objects.  Tunable, configurable, and flexible, this IP can be combined with image stabilization, optical flow and others to create airborne air-to-air, air-to-ground, ground-based, or other vehicle or people tracking systems - tuned to your environment for best results - all in a small form factor embedded solution. 
An FPGA-based hardware accelerated Open GL graphics processor core can provide a small footprint way to achieve graphics in an embedded application, and provide significant obsolescence protection and compactness of your system at the same time. No extra chips to buy. If you decide to increase performance or features in the future, they can be added without board or system redesign. DDC offer an OpenGL Library, drivers and HW accelerators for FPGA and ASIC implementations.