What DDC brings as a starting
point
We have all of the required IP to assemble a high quality scanning
or steering FLIR system. What DDC brings to your FLIR project:
-
IP in everything required, supporting high resolutions, frame rates,and bit-depths, as needed:
- NUC (Non uniformity correction, BPR (bad pixel replacement).
- State-of-the-art contrast algorithms
- Noise reduction filters, both spatial and temporal
- Sharpening, 3x3, 5x5, and 7x7
- All sorts of camera and display interfaces, both digital and analog
- Translate/rotate/zoom, countless scalers
- Picture in Picture
- Many graphic overlay possibilities, from simple full frame overlay, to full color Open GL alpha blended overlays
- Image stabilization
- Super-resolution
- All sorts of peripheral IP: UARTs, I2C, 1553B, CAN2.0, VME, Multibus, DDR/DDR2, CompactFlash, TI DSP EMIF, etc.
- Models of all IP, which makes for rapid system prototyping, to provide imagery and processed output for review, before committing to hardware
- Fully equipped lab, tools, and software for image generation, synchronization, and analysis
- Rapid implementation, since largely an integration
- Unparalleled expertise (see below)
DDC FLIR Expertise
Aside from having expert knowledge in imaging systems in general, particularly FLIR and CCD,
DDC has expert knowledge in the following, and has designed from concept to implementation, many FLIR systems,
for varied applications:
- Turn-key board/chip/software as needed for your application
- Single chip solutions for sophisticated imaging applications
- Making the correct hardware/software tradeoffs for optimally achieving objectives
- Ability to process FLIR and/or CCD, and even simultaneously, and also providing fusion and/or false coloring
- Algorithms ranging from NUC (Non-uniformity correction), to trackers, to specialized contrast algorithms, to sophisticated alpha blended Open GL color overlays
- Fine tuning algorithms for optimal imagery for a given application and camera
- System architecture in creating necessary bandwidth to accommodate required level of processing
- Getting all video processing into a tight space (typically single FPGA, or single FPGA with processor)
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