DDC EAVB Core Solutions
Digital Design Corporation (DDC) has a long standing collaborative relationship with Xilinx as a leading Alliance Program Member providing Design Services, System Integration and Intellectual Property.
EAVB services include many possible customizations. DDC is part of the AVnu Alliance™ to help standardize EAVB. Our leading engineers will help you build on this platform to maximize the performance of your application.
DDC EAVB IP Suite
With recent consumer demand driving a continual increase of audio and video features in automobiles, innovation in cars today increasingly depends on the reliability of in-car networks. The amount of cabling required for using point-to-point connections with next-generation Infotainment, driver assist, and/or connected services is quickly becoming financially and mechanically impractical. Ethernet Audio Video Bridging (EAVB) is currently being standardized within IEEE to enable reliable, low-latency audio and video transmission within Ethernet subnets. The standards include 802.1AS, 802.1Qat, 802.1Qav, and 1722, which respectively define precise timing/synchronization protocol (PTP), media stream reservation protocol (MSRP), forwarding and queuing for timesensitive media streams, and transport protocol for media streams. The DDC EAVB IP Suite, running on Xilinx® Spartan® -6 FPGA technology, collectively encompasses all of these standards – providing a complete solution for presenting and receiving audio and video media on a reliable and efficient AVB enabled network.
DDC EAVB Dev Kit
The DDC EAVB Development Kit includes two DDC EAVB modules. The first EAVB module connects to standard BT.656 video OR connects to a DVD player (audio and video – requires cable, not included). The second module receives the video and/or audio stream and drives this out to a DVI enabled monitor (DVI monitor not included).
The Dev Kit allows users to interact with certain EAVB settings via a DDC module that works within the Xilinx® EDK. The EDK is not included.
The kit will include the following FPGA Cores: TEMAC, EAVB Endpoint, AVB Media Packetizer, AVB Media Extractor (media clock recovery), Ethernet Frame Capture and Ethernet Frame Generator.
Included in kit:
1) 2 EAVB PCBs with a Xilinx® Spartan® -6 XC6SLX75 FPGA, Marvell 88E1111 Ethernet PHY, 512 MB of Micron DDR2 SDRAM, 256Mb of FLASH memory
2) 2 EAVB Audio/Video Mezzanine PCBs with an Audio CODEC, NTSC Decoder, and DVI output
3) 2 12V Power Supplies
4) An example FPGA design that illustrates an example EAVB transceiver system with NTSC video and stereo 48 kHz audio. This includes external device peripheral
logic, and the DDC EAVB IP Suite – comprised of the Ethernet AVB Endpoint, AVB Media Packetizer, AVB Media Extractor and Legacy Traffic Transceiver.
Not included in the kit:
1) Xilinx® EDK (the DDC system will work without this software, but access to controls via a GUI is only possible with the Xilinx EDK).
2) Video source – either BT.656 or DVD player
3) Audio source
4) DVI Enabled monitor
5) Speakers
